Course information

• Complete course name: 088949 - ADVANCED COMPUTER ARCHITECTURES (SILVANO CRISTINA)
• Profesor: Cristina Silvano
• Tutor: Gerardo Pelosi
• Accademic year: 2021-2022
• Recordings: link to webeep
• Webeep: link to webeep

Lessons

Date	Recording	Title	Slides
02 21	Recording	Introduction to the course	Lesson_0_Intro_ACA_Course ACA_Course - INFO_Spring_2022
02 23	Recording	Recap MIPS architecture and pipelining	Lesson_1_A_Pipelining_Spring_2022
03 02	Recording	Exercises on pipelining	03 02 Pipelining
03 07	Recording	Static Branch Prediction	Lesson_2_B_Static_Branch_Prediction
03 09	Recording	Dynamic Branch Prediction	Lesson_2_C_Dynamic_Branch_Prediction
03 14	Recording	Exceptions handling	Lesson_1_B_Exceptions_Handling
03 14	Recording	Instruction Level Parallelism introduction	Lesson_4_ILP_Intro
03 16	Recording	Multi cycle pipelining Instruction level parallelism Dynamic scheduling	Lesson_4_ILP_Intro EXE02_Pipeline_Superscalar_VLIW
03 21	Recording	Superscalar Very Long Instruction Word Processor Limits of multiple-issue processors	Lesson_4_ILP_Intro
03 21	Recording	Scoreboard scheme and architecture Scoreboard stages Scoreboard example	Lesson_5_A_Scoreboard
03 23	Recording	Recap of scoreboard Scoreboard example	Lesson_5_A_Scoreboard
03 23	Recording	Exercise on superscalar	EXE02_Pipeline_Superscalar_VLIW
03 28	Recording	Exercise on Scoreboard	EXE03_Scoreboard_First_Second_Exs
03 31	Recording	Tomasulo architecture	Lesson_5_B_Tomasulo
04 04	Recording	Register renaming Tomasulo Compiler renaming Explicit register renaming	Lesson_6_ILP_Reg_Renaming_2022
04 06	Recording	Exercises on Tomasulo	EXE04_TOMASULO_First_Second_Exs
04 11	Recording	Reorder Buffer	Lesson_7_A_Reorder_Buffer_2022
04 13	Recording	Exercises on reorder buffer	EXE05_ROB_V2022_CON_SOL
04 20	Recording	Introduction to cache	Lesson_3_A_Intro_Cache
04 20	Recording	Memory hierarchy Cache optimizations	Lesson_3_B_Advanced_memory
04 27	Recording	Mixed exercises	EXE06_recap_dyn_sched_V2022
05 02	Recording		Lesson_1_C_Intro_Performance