Pipeline hazards
An hazard is created when there is a dependence between instructions and the instructions are close enouth that the overlap caused by pipelining would change the order of access to the operands involved in the dependence.
Hazards prevent the next instruction in the pipeline from executing therefore they reduce the performance of the pipeline.
Hazards classification
1) Structural hazards
Attempt to use the ame resource from different instructions simultaneously. In other words, the hardware resources needed for an instruction are busy because they are used by another instruction therefore preventing the execution.
In the optimized MIPS pipeline the are not these hazards since the instruction and data memory are separated and in is possible to write and read the same registry in the same clock cycle (write in the first half and read in the second half).
2) Data hazards
Attempt to use a result of an instruction before the result is ready.
Some possible solutions to data hazards are:
- Insertion of nop
- Instruction scheduling: avoid that dependent instruction are too close inserting independent instruction between the dependent ones.
- Insertion of stalls
- Data forwarding: temporary results are stored in buffer inside the pipeline and they can be used instead of waiting for the write back of the result in the register file.
3) Control hazards
Attempt to make a decision on the next instruction to execute before the condition is evaluated.